1. Field of the Invention
This invention relates to a new and improved code tracking loop for coherent pseudonoise code receivers. More particularly, the present invention relates to a new error signal generation apparatus and novel transition gate logic circuitry.
2. Description of the Prior Art
Heretofore, coherent pseudonoise code tracking loops were known. Such prior art pseudonoise code tracking loops had two specific limitations which are solved by the present invention. The major limitation in the prior art code tracking loops were caused when the error signals became very small. The height and the shape of the error signal was attenuated to the point that it was difficult to properly control a voltage control oscillator in the tracking loop. The other limitation is caused in the prior art tracking loops when the keying and clock timing are skewed so as to cause timing offset. Timing offset, as will be explained hereinafter, causes error slope flattening near the null points. Another problem which has not been treated in the prior art is that sensitivity is degraded in the tracking loop when no transitions occur in the input line and no error signals are being generated. Under such conditions, all of the noise comes in through the input line and is processed as an error signal which can then cause distortions and improper operation of the voltage control oscillator in the tracking loop.
It would be desirable to provide a coherent pseudonoise code tracking loop which reshapes and redefines the error signal and the signal produced by timing offset so as to provide a distinct error correction signal which can be presented to the voltage controlled oscillator. Further, it would be desirable to provide a logic circuit which is capable of eliminating noise on the input line when there are no transitions of data at the input line.